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Title: | Modeling power VDMOSFET transistors: Device physics and equivalent circuit model with parameter extraction |
Authors: | Vaid, Rakesh Padha, Naresh Kumar, Anil Gupta, R S Parikh, Chetan D |
Keywords: | Power MOSFET;VDMOSFET;Device simulation;Parameter extraction |
Issue Date: | Oct-2004 |
Publisher: | CSIR |
IPC Code: | H01L 21/00 |
Abstract: | A power VDMOSFET has been simulated using PISCES-II, a 2-D numerical device simulator. The doping densities and device dimensions are chosen so as to simulate a typical device structure with one micron channel length. These simulations are aimed at understanding the device physics through various internal electrical quantities like potential distribution, electric field distribution, and electron concentrations etc. in different regions of the device both in on/off states. Simulated results have been used to extract circuit model parameters like VT, KP and λ etc. for a VDMOSFET equivalent circuit model comprising of a lateral MOSFET in series with a JFET. It advances the earlier models in terms of number of parameters extracted for its SPICE implementation. The characteristics obtained from the dc circuit model show good agreement with the simulated data, thus validating the device operation, the circuit model and its parameter extraction procedures. |
Page(s): | 775-782 |
ISSN: | 0975-1041 (Online); 0019-5596 (Print) |
Appears in Collections: | IJPAP Vol.42(10) [October 2004] |
Files in This Item:
File | Description | Size | Format | |
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IJPAP 42(10) 775-782.pdf | 394.14 kB | Adobe PDF | View/Open |
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