Please use this identifier to cite or link to this item: http://nopr.niscair.res.in/handle/123456789/57920
Title: Enhanced TACIT Encryption and Decryption Algorithm for Secured Data Routing in 3-D Network-on-Chip based Interconnection of SoC for IoT Application
Authors: Jayshree
Seetharaman, Gopalakrishnan
Pati, Debadatta
Keywords: Advanced Encryption Standard (AES);Application Specific Network on Chip (ASNoC);Cryptography;Internet-of-Thing (IoT);Security
Issue Date: Jun-2021
Publisher: NIScPR-CSIR, India
Abstract: This paper presents an enhanced TACIT (E-TACIT) encryption and decryption routing technique. It protects from illegal extraction of secret data in three-dimensional (3−D) routers of Network-on-Chip (NoC) by generating HASH function-based key. The E-TACIT technique solves keys and blocks size limitation of existing anticipated methods, as it has been designed for ‘n’ bit key and ‘n’ block size. Therefore, it secures data while routing process in 3−D NoC based interconnected System-on-chips (SoCs) for Internet-of-Thing (IoT) application. The NoC based interconnection provides high scalability and requires low energy consumption for data processing than conventional bus-based SoCs. The E-TACIT has been examined for Moving Picture Experts Group (MPEG-4). The technique synthesized using Vivado 2016.2 and implemented on ZYNQ XC7Z020-CLG484 FPGA for 1024 bits and verified using a network simulator. Here, we have also incorporated pipelining, re-trimming, and clock gating techniques in the design and used Dual-Port RAM during verification, which helps in achieving low latency and high throughput and occupy less silicon in comparison to Data Encryption Standard (DES) and Advanced Encryption Standard (AES) techniques.
Page(s): 520-527
URI: http://nopr.niscair.res.in/handle/123456789/57920
ISSN: 0975-1084 (Online); 0022-4456 (Print)
Appears in Collections:JSIR Vol.80(06) [June 2021]

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