Please use this identifier to cite or link to this item: http://nopr.niscair.res.in/handle/123456789/55428
Title: A 128Kb RAM Design with Capacitor-Based Offset Compensation and Double-Diode based Read Assist Circuits at Low VDD
Authors: Yamani, Sudha Vani
Rani, N Usha
Vaddi, Ramesh
Keywords: Current-controlled sense amplifier (CCSA);Offset cancellation;RSNM;SRAM;WLUD
Issue Date: Sep-2020
Publisher: NISCAIR-CSIR, India
Abstract: Low power static random access memory (SRAM) takes significant portion of area on chip in all modern SOCs and emerging Computing-in-memory applications for edge devices in IoT. This work proposes novel readability assist with the double-diode based word line under drive (WLUD) has been effective improving the read-static noise-margin (RSNM) by 26–46%and proposed a capacitor based current controlled sense amplifier offset compensation scheme. This scheme achieves 4X reduction in standard deviation of offset voltage over conventional sense amplifier design with 1.1% and 2.9% of area, power overheads respectively with 90 nm CMOS technology at 0.5–1.0 V supply voltages.
Page(s): 788-793
URI: http://nopr.niscair.res.in/handle/123456789/55428
ISSN: 0975-1084 (Online); 0022-4456 (Print)
Appears in Collections:JSIR Vol.79(09) [September 2020]

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