Please use this identifier to cite or link to this item: http://nopr.niscair.res.in/handle/123456789/49553
Title: Design Analysis & Implementation of a New Reversible Ciirc Gate
Authors: Krishnaveni, D
Priya, M Geetha
Keywords: Basic gates;Universal gates;Reversible logic;Low power CMOS;Quantum computing
Issue Date: Aug-2019
Publisher: NISCAIR-CSIR, India
Abstract: Reversible logic in quantum computing and nanotechnology provides solution to optimize the power and this technique can be put into use in a variety of low power applications such as optical computing, and CMOS VLSI design. All basic and universal gates can be used to design any logic network and they are the elementary building blocks of Integrated Circuits. In this paper, a reversible CIIRC (Combinational Innovation In Reversible Circuit) gate that generates basic (AND, OR, NOT, EXOR, EXNOR) and universal (NAND, NOR) gate outputs is proposed. Reversible CIIRC gate is unique and first of its kind to be available in reversible logic gates family as it can generate the outputs of all basic and universal gates with zero garbage outputs and only one constant input to select between basic or universal gate. The basic and universal gates design with reversible CIIRC gate has least constant inputs, garbage outputs, and number of reversible gates than other designs, thus optimizing and improving the efficiency of the proposed design. The proposed design is synthesized, simulated, logically verified and implemented using FPGA Spartan XC3S400-5PQ208. The simulation results and implementation validate the functionality of the reversible gate design. It is found that power dissipation and delay in reversible CIIRC is less compared to basic and universal gates using CMOS logic with a power reduction of around 93.4% at 180nm and 95% at 90nm CMOS process technologies respectively.
Page(s): 546-550
URI: http://nopr.niscair.res.in/handle/123456789/49553
ISSN: 0975-1084 (Online); 0022-4456 (Print)
Appears in Collections:JSIR Vol.78(08) [August 2019]

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