Please use this identifier to cite or link to this item: http://nopr.niscair.res.in/handle/123456789/48790
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dc.contributor.authorBazzazi, A-
dc.contributor.authorManzuri, M T-
dc.date.accessioned2019-07-05T06:21:57Z-
dc.date.available2019-07-05T06:21:57Z-
dc.date.issued2019-07-
dc.identifier.issn0975-1084 (Online); 0022-4456 (Print)-
dc.identifier.urihttp://nopr.niscair.res.in/handle/123456789/48790-
dc.description415-418en_US
dc.description.abstractHardware Trojan refers to an unintended or undesirable alteration in many circuits which turned out to be a major challenge for the design and fabrication of integrated circuits for the semiconductor industries. Such a challenge has been addressed in numerous critical applications. Due to their diversity and process variation, Trojans vary in terms of detection and prevention methods. This paper proposes a novel technique for the Trojan detection involving the application of self-examining circuits. This method adequately resists against the PV and scalability and do not need to any golden ICs. Segmenting the circuit enables the technique to both detect and locate the Trojans with a quick possible time. The implementation of this method indicates a significant improvement in the detection rate.en_US
dc.language.isoen_USen_US
dc.publisherNISCAIR-CSIR, Indiaen_US
dc.rights CC Attribution-Noncommercial-No Derivative Works 2.5 Indiaen_US
dc.sourceJSIR Vol.78(07) [July 2019]en_US
dc.subjectHardware Securityen_US
dc.subjectHardware Trojansen_US
dc.subjectPrevention and Detection Methodsen_US
dc.subjectSelf-examining Circuiten_US
dc.titleProposing a Novel Method for Hardware Trojan Detectionen_US
dc.typeArticleen_US
Appears in Collections:JSIR Vol.78(07) [July 2019]

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