Please use this identifier to cite or link to this item:
Title: CNFET-based design of resilient MCML XOR/XNOR circuit at 16-NM technology node
Authors: Srivastava, Pragya
Islam, Aminul
Keywords: CNFET;EDP;MOS current mode logic;Power delay Product;Propagation delay (tp);Variability
Issue Date: Jun-2015
Publisher: NISCAIR-CSIR, India
Abstract: Due to aggressive scaling, CMOS technology is facing a few critical issues. Few of them are variability, subthreshold leakage, gate leakage, and short-channel effects. Variability has become a metric of equal importance as power, delay, and area in deep submicron technology node. Therefore, this paper carries out power delay product (PDP) variability analysis of MOS current mode logic (MCML) and CMOS inverter/buffer and XOR/XNOR circuits in addition to propagation delay (tp), average power (PWR), power-delay product (PDP) and energy-delay product (EDP) analysis at 16-nm technology node. MCML inverter/buffer (XOR/XNOR) circuits prove their robustness by exhibiting 1.66× (1.82×) improvement in PDP variability at nominal supply voltage of VDD = 0.7 V. Therefore, this work realizes XOR/XNOR circuit using carbon nanotube field effect transistor (CNFET). CNFET based MCML XOR/XNOR circuit exhibits lower tp (by 91.20×), lower PDP (by 3.15×) and lower EDP (by 287.69×) compared to MOSFET based MCML XOR/XNOR at nominal VDD.
Page(s): 261-267
ISSN: 0975-1017 (Online); 0971-4588 (Print)
Appears in Collections:IJEMS Vol.22(3) [June 2015]

Files in This Item:
File Description SizeFormat 
IJEMS 22(3) 261-267.pdf379.75 kBAdobe PDFView/Open

Items in NOPR are protected by copyright, with all rights reserved, unless otherwise indicated.