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JSIR Vol.71 [2012] >
JSIR Vol.71(04) [April 2012] >
| Title: | Study and comparison of CMOS layouts for applications in analog circuits |
| Authors: | López, Francisco
Estrada, Johan
Linares, Monico
Zúñiga, Carlos
Soto, Blanca |
| Keywords: | Integrated Circuit (IC)
Layout
Operational Amplifier
Serpentine |
| Issue Date: | Apr-2012 |
| Publisher: | NISCAIR-CSIR, India |
| Abstract: | This study presents different layouts techniques
(serpentine, concentric, interdigitated) applied to a differential amplifier
designed in commercial technology CMOS (0.6 μm). It was observed that
serpentine technique improves by 6 to 7 electrical parameters, where area was
reduced (64%) and power consumption diminishes until a 57% with respect to
conventional technique. Thus designer can optimally use different abstraction
levels during integrated circuits (IC) design, by applying the best layout
technique towards efficient systems. |
| Page(s): | 257-261 |
| CC License: |  CC Attribution-Noncommercial-No Derivative Works 2.5 India |
| ISSN: | 0975-1084 (Online); 0022-4456 (Print) |
| Source: | JSIR Vol.71(04) [April 2012]
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