Browsing by Author Rajamani, V

Jump to: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
or enter first few letters:  
Showing results 1 to 1 of 1
Design and VLSI architecture of non-polynomial based low probability of error (Pb) Viterbi decoderArun, C; Rajamani, VJSIR Vol.68(1) [February 2009]97-106